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Test the core on SP605 dev kit, along with the FMC-ADC-100M-14b-4cha. f760l login 11-11-2010 Publication of the prototype made for SP605 dev kit 17-02-2016 Project has new maintainer DDR3 controller with two pipelined Wishbone slave ports It is based on the Spartan6 hardware core and a management core generated by Xilinx CoreGen